Application Engineer In Dft Design For Test - Milano, Italia - Cadence Design Systems

    Cadence Design Systems
    Cadence Design Systems Milano, Italia

    2 settimane fa

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    Application Engineer in DFT Design For Test page is loaded Application Engineer in DFT Design For Test Apply locations MILAN VELIZY (Paris) time type Full time posted on Posted 6 Days Ago job requisition id R44630 At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

    We are looking for an Application Engineer in DFT Design For Test In Milan, Italy or in Paris, France or in Valbonne, France

    Job Description, Role and Key Responsibilities This is an excellent opportunity to work on challenging and complex SoC projects with Cadence customers in the semiconductor domain.



    The Application Engineer will:

    Provide high level of technical customer support for our products related to digital Design For Test.

    Identify and track technical issues in Customers' DFT design environment, prioritize these issues considering both Customer's & Cadence's needs and drive their resolution.

    Assist the Customer with DFT flow development, e.g.

    improve existing design methodologies, develop new methodologies that leverage Cadence tools & servicesSupport technical evaluations (including Beta evaluations with Cadence R&D and the customer) of new digital EDA tools, flows and methodologies.

    Provide direct contribution to key design projects, e.g. be responsible for driving Cadence DFT for key tasks on these projects.

    Develop and maintain technical and soft skills to be seen as a trusted EDA tool specialist with a deep knowledge in Cadence's DFT tools.

    Work with the Cadence Sales team to identify additional sales opportunities.

    Requirement, Experience, Education

    The Application Engineer will:

    Have good understanding of DFT concepts and methodologies (ATPG, SCAN, BIST, ...)

    Have some knowledge on our SW tools:
    Modus, Genus, or similar tools from other EDA vendors.
    Have excellent communication and problem-solving skillsBe prepared to visit Cadence customers in Southern Europe (France, Italy, Switzerland, ...)
    Experience in digital DFT design and possibly some of the following disciplines:

    SynthesisSTARTL design and verificationCAD support for Digital IC Design and related flowsAnd,
    Good communication skills; Excellent team spirit
    Fluent in English
    2 to 4 years of experience in microelectronics/EDA industry
    Degree in Electrical/Electronic Engineering, Microelectronics, or a related discipline.
    We're doing work that matters. Help us solve what others can't. Similar Jobs (2) Application Engineer System Verification locations MILAN time type Full time posted on Posted 20 Days Ago Lead AE in Custom IC locations MILAN time type Full time posted on Posted 6 Days Ago
    Cadence plays a critical role in creating the technologies that modern life depends on.

    We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.

    Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For.

    Our shared passion for solving the world's toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.


    Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer.

    All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

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