Experienced Layout Enginee - Milano, Italia - Orca Semiconductor

Descrizione

At Orca Semiconductor our vision is to address our customers real world analog problems

and innovate solutions that enable life changing products to be realized for a more

sustainable future. We are a corporate funded fabless semiconductor company focused on

Analog IC innovations for the Internet of Things (IOT) connected devices. Orca aims to

disrupt the analog semiconductor market with new innovations based on intimate customer

Orca is founded by experienced analog IC solution innovators that have spent decades

defining, developing, and successfully selling world class solutions for the industry's largest

analog semiconductor companies like Maxim Integrated (Analog Devices), Intersil, ST and

Freescale.

Orca Semiconductor is looking for experienced layout design talent in the Milan, Italy area.

Our immediate focus is to produce industry leading low quiescent power solutions for

understanding of analog layout critical aspects and a strong background in BCD

the initiative to drive for results. Since Orca has many locations, communication and

cooperation with distributed teams is key to a successful design, making English proficiency

required.

You will work in a fast-paced and rapidly growing environment. Your close cooperation with

experienced leaders will offer opportunities for quick professional growth. You will be a key

contributor to the company success, not just another member of a large organization and

your contributions will be visible and rewarded.


Responsibilities:

• In cooperation with project team develop full chip layout from floor plan to tape out
• Work closely with designers to optimise block performance and area
• Run physical verification on blocks and full chip (LVS, DRC, parasitic extraction )
• Generate detailed layout schedule and track progress
• Mentor and supervise junior layout designers

Minimum requirements

• Bachelor's Degree in electronic engineering or equivalent qualification
• 10+ years of experience in analog layout
• Strong experience with Cadence layout tools
• Proven track record of successful completion of multiple full chip tape out
• Knowledge of semiconductor device physics, crosssection, and construction
• Good English speaking/reading/writing skills

Language:

• English (preferred)