Staff engineer digital design - Padua - Infineon Technologies

    Infineon Technologies
    Infineon Technologies Padua

    11 ore fa

    Descrizione
    We Are In for jobs that impact everyone's life.

    What if your ideas could change the way the world connects, powers up, or thinks? As a Staff Engineer Digital Design in our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life.

    Are you in?Your RoleKey responsibilities in your new roleAs a Staff Engineer Digital Design, you will play a crucial role in developing innovative automotive power management solutions—OPTIREG Power Management ICs (PMICs)—by driving the design and implementation of cutting‐edge digital and analog/mixed‐signal blocks.

    Drive and/or support product feasibility studies and architecture definition in collaboration with application, analog design and technical marketing teamsDefine top‐level concept partitioning and interfaces for digital and analog‐mixed signal blocksDefine DFT concepts and create robust integration system architecturesPerform RTL design using VHDL/Verilog, ensuring compliance with performance and quality requirementsSupport the complete RTL to GDS flow, ensuring design constraints and synthesis feasibilityGenerate design documentation and participate in design and risk reviews, including FMEA activitiesContribute to verification, validation, and debug plans, working closely with product, quality, and test engineeringYour ProfileQualifications And Skills To Help You SucceedMaster's degree or Ph D in Electrical/Electronic Engineering or related field, with specific knowledge of microelectronic devices and digital circuit designAt least 3 years of experience in digital design for sub‐micron technologiesKnowledge of Verilog and/or System Verilog is a plusProficiency with common design tools and good knowledge of Unix OS and scripting (Perl, Python) is a plusExperience with Design for Testability (DFT), RTL‐to‐GDSII flows, Universal Verification Methodology (UVM), and Requirements Management methodologies is a nice‐to‐haveStrong problem‐solving and analytical skills, with a proactive mindset and team‐focused attitudeFluency in English (mandatory)

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